[chriswc]

Hi
Could someone who really knows let us all in on what the hell all those RAM specifications mean!!!!! Not so long ago it was all 2-2-2 or 3-3-3, but what did it mean? And now, DIMMs are being sold as CL2 or CL3, but again, what does it mean? I'm sure many of us would appreciate a bit of demystification here. Thanks to anyone who can shed some light.

Regards,
Chris Carruthers, Crescendo Software.
http://www.crescendosw.com

[drmemory]

This will be a little deep for some users at first. It gets less deep towards the end of this post.

This nomenclature originates from the INTEL PC SDRAM Unbuffered DIMM Specification 1.0 (page 46), in which INTEL gives an assembled DIMM naming convention. The convention is in the form "PCX-ABC-DEF" and each letter or pair of letters specifies a value. PC stands for Personal Computer (of course). "X" will either be 66 for 66MHz, or 100 for 100MHz or 133 for 133MHz. "A" stands for fastest CAS Latency (CL) supported ("2" is faster than "3"). "B" stands for RAS-to-CAS delay (tRCD), in clock cycles ("2" is faster than "3"). "C" stands for RAS precharge time (tRP), in clock cycles ("2" is faster than "3"). "D" stands for time to valid output to appear after clock input after clock setup (tAC), in nanoseconds(ns). "6" is standard for "D" at 100MHz. "E" stands for the SPD Protocol Version. Version 1.2b is current and is abbreviated as "2". "F" is reserved for future applications and is always "0" at this time.

Here's an example without the "DEF", as the last three variables should always remain the same for PC100 memory. A DIMM with PC100-222 can run at 100MHz (or 66MHz), with usable CAS Latencies of 2 and 3. The tRCD is 2 clock cycles and occurs before every read or write operation (meaning there is only a delay of 2 clock cycles as opposed to 3 clock cycles when this number is "3"). The tRP is 2 clock cycles. tRP must occur before several types of actions internal to the SDRAM can occur. Therefore 2 clock cycles is faster than 3 clock cycles for tRP.


OK, now, in English. If you have a computer that can run at CAS Latency 2, then you want all of your DIMMs to be CL2. If one DIMM is a CL3 DIMM only, all of the DIMMs will run at CL3. ALL of your memory runs at the slowest DIMM parameters. The same is true for the "B" and "C" variables.

In addition, if you get a PC133 CL3 module for a 100MHz memory bus Mac, Apple specifies that PC133 modules be backwards compatible. This means that even a CL3 PC133 module, should work at CL2 for a 100MHz memory bus. If not, the module doesn't comply with Apple standards.