[badtz]

Does anyone know of the technical reason, why RAM must be installed in pairs?


was curious why we're back to the old days of installing RAM in pairs

[timmerk]

I think it's just for dual processors - and if so, then one for each.

I could be way off though.

[proton]

You're way off.

It's basically because the RAM isn't fast enough to be able to get to the speed Apple wants for their RAM. By requiring pairs of RAM you can basically double the speed of the RAM.

2 x DDR400 = 800MHz
On a 800, 900, 1000, 1250 MHz bus, you don't want to be using 400MHz RAM speeds now do you?

- proton

[badtz]

... but why would you NEED to install in pairs?


how would installing in twos double the bandwidth? why not install three?

[jcadam]

Originally posted by badtz:
... but why would you NEED to install in pairs?


how would installing in twos double the bandwidth? why not install three?

Dual Channel memory bus. Basically, two 400Mhz Channels (well, 200Mhz DDR). Each channel must have equal amounts of RAM. If you install two equally sized DIMMs in your system, one belongs to channel A, the other belongs to channel B, and they can be accessed simultaneously.

High-end chipsets on the PC side use the same concept. It works because modern processors like the G5, K8, and P4 have 128-bit memory busses, and DIMMs are 64-bits wide (2x64 bit channels to fully utilize the 128 bit bus). Some of those chipsets also support using single channel mode (if you don't want to use pairs of DIMMs), but only a moron would run their system that way (so don't be upset that the PowerMac G5 doesn't support this).

SIMMs usually had to be installed in pairs. The original Pentium had a 64 bit memory bus. 72 pin SIMMs were 32 bits wide, so to fully use the bus, you had to install memory in pairs (the first pentium systems used 72 pin SIMMs). A 486SX has a 32 bit bus and can use ONE 72 pin SIMM. 30 pin SIMMs were only 8-bits wide, so in a system like a 386SX, that had a 16 bit bus (the 386DX had a 32 bit bus), you had to install in pairs. On some old mac systems with 32 bit busses and 30 pin memory slots (some 68030 and a lot of the 68040 based systems) , you had to install your memory in sets of four.

[badtz]

jcadam,

perfect answer! EXACTLY what I needed

Thanks mucho!

[sphinx]

So with this dual channel ram and the size of the FSB, would it be possible to install some higher clocked ram and get benifits from it??

[Catfish_Man]

Originally posted by sphinx:
So with this dual channel ram and the size of the FSB, would it be possible to install some higher clocked ram and get benifits from it??

No. It has two double data rate 200MHz hookups to memory, allowing for dual channel DDR400. Anything faster than that runs faster than its connection to the northbridge does and is essentially useless.

<edit> if Apple upgraded the northbridge, though, the G5's FSB is certainly capable of handling faster ram. </edit>

[Drakino]

Quick lesson on how memory (DRAM variety) works:

To write to memory, you send an electronic signal to a capacitor. You either charge it, or don't (1 or 0).

To read, you check the capacitorto see if it is full or empty. The problem is, checking it always drains it, so you have to then write the same data back to the capacitor.

So, because you have to rewrite, you loose a bit of speed here, as a write or read closes off the row and column that capacitor is in on the memory chip.

Thus, if you interleave your memory (aka, install two identical DIMMs), the system can alternate back and forth, writing the first bit to the first dimm, and the second bit to the second dimm. When you go to read, you can read the first bit, and then read the second bit right away as the first dimm refreshes the memory.

[xtro]

Originally posted by timmerk:
I think it's just for dual processors - and if so, then one for each.

I could be way off though.

I'm sorry man, but I totally just pissed my goddamn pants at how stupid that post was. But like, I mean that in a nice way.

[jcadam]

Originally posted by Drakino:
Quick lesson on how memory (DRAM variety) works:

To write to memory, you send an electronic signal to a capacitor. You either charge it, or don't (1 or 0).

To read, you check the capacitorto see if it is full or empty. The problem is, checking it always drains it, so you have to then write the same data back to the capacitor.

So, because you have to rewrite, you loose a bit of speed here, as a write or read closes off the row and column that capacitor is in on the memory chip.

Thus, if you interleave your memory (aka, install two identical DIMMs), the system can alternate back and forth, writing the first bit to the first dimm, and the second bit to the second dimm. When you go to read, you can read the first bit, and then read the second bit right away as the first dimm refreshes the memory.

This is why the next PowerMac needs to switch to an ALL SRAM memory system. Anyone mind paying $15,000 for a PM?