It's the latency in various parts of the read (or write, but that doesn't really matter) process - it's the number of cycles it takes to do one step. The first figure is the CAS latency, I think - the time it takes to load the first half of the memory address onto the chip. Lower is better, obviously, though it's not that big a deal in regular usage. The chips run at the speed of the slowest one, so you're not seeing that very minor speed gain in any case.
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