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NAND and NANO.
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NAND and NANO have a one letter difference.
If I recall correctly, the type of flash chip in the Nano is NAND.
Coincidence? I THINK NOT!!
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Last edited by brokenjago; Oct 9, 2005 at 01:31 AM.
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It's a conspiracy…
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It probably had some influence on Jobs' decision to name it the nano. Remember, rumor claimed they were to remain minis.
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A NAND is also a "Negative AND" Gate, or an inverted AND, a common electronics circuit dating back to the 60s or earlier.
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Originally Posted by Eriamjh
A NAND is also a "Negative AND" Gate, or an inverted AND, a common electronics circuit dating back to the 60s or earlier.
Yep. The NAND memory is made out of a bunch of those and therefore named after them.
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Originally Posted by Eriamjh
A NAND is also a "Negative AND" Gate, or an inverted AND, a common electronics circuit dating back to the 60s or earlier.
I think you mean "Not And". The few things I remember from university was the prof always correcting this.
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Originally Posted by bradoesch
I think you mean "Not And". The few things I remember from university was the prof always correcting this.
They mean the same thing.
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Originally Posted by Eriamjh
A NAND is also a "Negative AND" Gate, or an inverted AND, a common electronics circuit dating back to the 60s or earlier.
I didn't know they became extinct. You can find them in Radioshack and there are billions of them inside your Mac.
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Not AND for the win!
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It turns out that as far as CMOS logic circuits go, NAND and NOR gates are the easiest gates to manufacture (i.e. fewest number of transistors.) Conveniently, you can also make any other logic equation you like out of NAND or NOR gates. So, most semiconductor processes use these as their basic building blocks.
For some reason which I'm not aware of, flash memory manufacturing processes tend to be either NAND-based or NOR-based. (I don;t really know why they need to be one or the other.) Most Flash manufacturers have had NOR-based processes, but Samsung recently developed a NAND-based process (and those chips are what is in the Nano...)
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Last edited by Dork.; Oct 9, 2005 at 05:25 PM.
Reason: Nano, not mini, silly rabbit!)
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Originally Posted by Tesseract
They mean the same thing.
No, they don't. A "negative" AND gate would invert both inputs then AND them, while a NAND gate inverts the result of ANDing the two unaltered inputs, and then inverting the result. It makes a big difference-an inverted input is usually called an "Inhibit" signal, and is treated somewhat differently in Boolean logic than a NAND or NOR input or result.
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Originally Posted by ghporter
No, they don't. A "negative" AND gate would invert both inputs then AND them, while a NAND gate inverts the result of ANDing the two unaltered inputs, and then inverting the result. It makes a big difference-an inverted input is usually called an "Inhibit" signal, and is treated somewhat differently in Boolean logic than a NAND or NOR input or result.
I see. I would have called the gate you described a 'NOR gate' though.
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Originally Posted by The Godfather
I didn't know they became extinct. You can find them in Radioshack and there are billions of them inside your Mac.
I said they dated back to the 60s, not that they were extinct!
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Originally Posted by Tesseract
I see. I would have called the gate you described a 'NOR gate' though.
Functionally, an "inverted input AND" generates the same logic table as a NOR gate, but because it has inverted inputs, it's considered a "two inhibit" gate; in order to get a non-inhibited output, it must have two "active low" inputs (which are inverted and then ANDed to generate a high output). It gets pretty convoluted, but when specifying the LOGIC of a system, it's best to use only the gates that most clearly indicate the flow of signals, rather than trying to mimic what hardware will be used to implement the logic.
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Originally Posted by Dork.
It turns out that as far as CMOS logic circuits go, NAND and NOR gates are the easiest gates to manufacture (i.e. fewest number of transistors.) Conveniently, you can also make any other logic equation you like out of NAND or NOR gates. So, most semiconductor processes use these as their basic building blocks.
For some reason which I'm not aware of, flash memory manufacturing processes tend to be either NAND-based or NOR-based. (I don;t really know why they need to be one or the other.) Most Flash manufacturers have had NOR-based processes, but Samsung recently developed a NAND-based process (and those chips are what is in the Nano...)
Maybe some person in Silicon Valley owns the patent?
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Originally Posted by ghporter
Functionally, an "inverted input AND" generates the same logic table as a NOR gate, but because it has inverted inputs, it's considered a "two inhibit" gate; in order to get a non-inhibited output, it must have two "active low" inputs (which are inverted and then ANDed to generate a high output). It gets pretty convoluted, but when specifying the LOGIC of a system, it's best to use only the gates that most clearly indicate the flow of signals, rather than trying to mimic what hardware will be used to implement the logic.
I will try to remember that for my next digital logic exam.
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Yeah, well after having to both use and teach the stuff, these details kind of get to be second nature... And if they're important enough to be part of the course (and be tested) they're important enough to get right, so I work at it.
NAND logic circuits are very common in CMOS and newer hardware because it is fairly easy to make a CMOS transistor with two gate lines that has a high output when either gate is low. It sort of naturally falls into place as it were.
I'm still curious why Apple skipped 'micro' and went straight to 'nano,' though.
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Originally Posted by ghporter
I'm still curious why Apple skipped 'micro' and went straight to 'nano,' though.
Probably to avoid any "micro"-soft references.
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But iPods are hardware! Microsquish got pretty much out of the hardware business a long time ago (mainly because they couldn't cut the mustard) except for some mice and keyboards.
However, from both a legalistic and an advertising standpoint, you're probably right. But that only leaves "pico" and "femto" before they get down to nothing at all. It doesn't leave a lot of room for innovation. Maybe the "iPod half-Euro?" for a player the size of a half-Euro coin? The "iPod Vegas Dice" for one that's the size of Vegas-standard dice? The "smallness" prefix concept seems to have played out now. What a shame.
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Originally Posted by ghporter
But iPods are hardware! Microsquish got pretty much out of the hardware business a long time ago (mainly because they couldn't cut the mustard) except for some mice and keyboards.
However, from both a legalistic and an advertising standpoint, you're probably right. But that only leaves "pico" and "femto" before they get down to nothing at all. It doesn't leave a lot of room for innovation. Maybe the "iPod half-Euro?" for a player the size of a half-Euro coin? The "iPod Vegas Dice" for one that's the size of Vegas-standard dice? The "smallness" prefix concept seems to have played out now. What a shame.
In addition to pico and femto, 'atto', 'zepto', and 'yocto' are left.
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True, but after 'femto' things get kind of odd. "Atto" sounds a lot like one of the 9/11 terrorists: "Muhamad Atto." "Zepto" is of course the notorious seventh Marx brother. And isn't "Yocto" the goofier of the two "Warner Brothers" on "Animaniacs?" See what I mean?
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Originally Posted by ghporter
Yeah, well after having to both use and teach the stuff, these details kind of get to be second nature... And if they're important enough to be part of the course (and be tested) they're important enough to get right, so I work at it.
Well, I get paid to work with this stuff. And although all this stuff was second nature to me right out of college, we let the design tools deal with all that messy "logic" stuff. I only deal with the nitty-gritty of logic equations when we suspect that the design tools are wrong. (which happens more often than you might think, given how expensive that software is!)
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Jesus. This thread has gone way out of my depth.
Carry On.
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Originally Posted by The Godfather
Maybe some person in Silicon Valley owns the patent?
More likely Japan or Taiwan....
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Originally Posted by Dork.
More likely Japan or Taiwan....
Nope, like I said, it's really easy to make a field effect transistor with two gates so the source or drain is low when both gates are low and the output is high at all other times. Note also that the "storage cells" in RAM tend to be field effect transistors that hold a charge like a capacitor (a very leaky one!). So now, using flash components to do the same thing as CMOS components should seem logical (sorry about the pun), and that it should appear natural to make flash memory out of NAND gates-which are most likely just individual transistors.
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Originally Posted by ghporter
Nope, like I said, it's really easy to make a field effect transistor with two gates so the source or drain is low when both gates are low and the output is high at all other times. Note also that the "storage cells" in RAM tend to be field effect transistors that hold a charge like a capacitor (a very leaky one!). So now, using flash components to do the same thing as CMOS components should seem logical (sorry about the pun), and that it should appear natural to make flash memory out of NAND gates-which are most likely just individual transistors.
I understand why you'd want to use NAND gates for flash -- you're always after density when you manufacture any type of storage chip, and NAND's and NOR's are the densest gates you can have. What I don't understand is precisely what the architecture of a typical flash chip is, and why NAND archirecture chips are so different than NOR chips.
A little bit of Googling (in between shifts trying to get my 11 month old (teething) daughter to sleep) yields that there are structural differences between the two architectures. NAND-based Flash tends to be smaller and consume less power than its NOR counterparts, but addressing is more complicated and the NAND architecture is more prone to bit errors. (Non-techies with a shiny new Nano shouldn't be concerned at that statement -- modern Error Correcting algorithms can fix the situation quite nicely, and no doubt Samsung has them integrated into the Flash chips....)
Maybe I'll try and find a datasheet for the Samsung NAND flash part and see if it can answer some of my questions....
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Originally Posted by ghporter
Functionally, an "inverted input AND" generates the same logic table as a NOR gate, but because it has inverted inputs, it's considered a "two inhibit" gate; in order to get a non-inhibited output, it must have two "active low" inputs (which are inverted and then ANDed to generate a high output). It gets pretty convoluted, but when specifying the LOGIC of a system, it's best to use only the gates that most clearly indicate the flow of signals, rather than trying to mimic what hardware will be used to implement the logic.
Yes, but even though they perform the same function, the AND gate with inverted output has a simpler implementation than the OR gate with inverted inputs. This is because transistor switches have inverting outputs inherently (pulldown networks). The CMOS NAND gate is shown below:
But all this talk about CMOS is useless. Flash is not based on CMOS gates, it it based on FAMOS gates, a derivative of NMOS.
(
Last edited by The Godfather; Oct 9, 2005 at 10:28 PM.
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Originally Posted by The Godfather
Yes, but even though they perform the same function, the AND gate with inverted output has a simpler implementation than the OR gate with inverted inputs. This is because transistor switches have inverting outputs inherently (pulldown networks).
Correct that in certain logic families (such as CMOS) inverting logic is simpler than non-inverting. But since an OR gate with inverted inputs has exactly the same function as a NAND gate, wouldn't they be implemented the same way?
Originally Posted by The Godfather
But all this talk about CMOS is useless. Flash is not based on CMOS transistors, it it based on FAMOS gates, a derivative of NMOS.
CMOS refers to logic implemented by balanced PMOS and NMOS transistors; it's not a transistor type.
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Originally Posted by brokenjago
NAND and NANO have a one letter difference.
If I recall correctly, the type of flash chip in the Nano is NAND.
Coincidence? I THINK NOT!!
Apophenia...!?
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Originally Posted by Tesseract
Correct that in certain logic families (such as CMOS) inverting logic is simpler than non-inverting. But since an OR gate with inverted inputs has exactly the same function as a NAND gate, wouldn't they be implemented the same way?
CMOS refers to logic implemented by balanced PMOS and NMOS transistors; it's not a transistor type.
An explicitly designed OR gate with inverted inputs would have these three stages:
1. inverting the inputs
2. the NOR function (remember that the gates are inherently output inverting)
3. inverting the output
With obvious and trivial optimization, IC engineers simplify this circuit into a NAND gate.
You are right that no transistor can be classified as a CMOS transistor. But there are gates made of NMOS transistors only, thus named NMOS gates.
The juicy part of flash technology is how they make them non-volatile without any power.
This is my memory refresher: http://en.wikipedia.org/wiki/Flash_memory
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Originally Posted by ghporter
But iPods are hardware! Microsquish got pretty much out of the hardware business a long time ago (mainly because they couldn't cut the mustard) except for some mice and keyboards.
Yeah. XBox must be a figment of my imagination.
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Originally Posted by brokenjago
NAND and NANO have a one letter difference.
So have sh!t and shot !
Let's start a new religion over that !
-t
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Originally Posted by Eriamjh
Yeah. XBox must be a figment of my imagination.
The XBox is not a computer-at least it's not marketed as computer hardware. I was referring to stuff specifically marketed as being computers or computer accessories.
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