Samsung Electronics announced that it has begun mass producing the industry's first 256-gigabit (Gb), three-dimensional (3D) Vertical NAND (V-NAND) flash memory based on 48 layers of 3-bit multi-level-cell (MLC) arrays for use in solid state drives (SSDs). The new technology will boost data density in future offerings, and an improvement in efficiency will help to keep future costs down.
Samsung introduced its second generation V-NAND (32-layer 3-bit MLC V-NAND) chips in August 2014. In the new third generation V-NAND chip, each cell utilizes the same 3D Charge Trap Flash (CTF) structure in which the cell arrays are stacked vertically to form a 48-storied mass that is electrically connected through 1.8 billion channel holes punching through the arrays thanks to a new etching technology. In total, each chip contains over 85.3 billion cells. They each can store 3 bits of data, resulting 256 billion bits of data
Samsung's new 256Gb 3D V-NAND flash doubles the density of conventional 128Gb NAND flash chips. In addition to enabling 32 gigabytes (256 gigabits) of memory storage on a single die, the new chip will also easily double the capacity of Samsung's existing SSD line-ups, and provide an ideal solution for multi-terabyte SSDs.
A 48-layer 3-bit MLC 256Gb V-NAND flash chip consumes over a 30 percent reduction in power compared to a 32-layer, 3-bit MLC, 128Gb V-NAND chip when storing the same amount of data. During production, the new chip also achieves approximately 40 percent more productivity over its 32-layer predecessor, keeping costs of the media down.
Samsung plans to produce third generation V-NAND throughout the remainder of 2015. The company plans to increase its high-density SSD sales for the enterprise and data center storage markets with leading-edge PCIe NVMe and SAS interfaces following a consumer rollout of the new technology.
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