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denim · Sep 5, 2003, 02:11 PM

Given that the processor is from IBM, I figure we've got a new kind of IBM-compatible system here.

MusicalTone · Sep 5, 2003, 02:25 PM

Originally posted by denim:
Given that the processor is from IBM, I figure we've got a new kind of IBM-compatible system here.

Yep, they got there in the end. Shame its all now about Intel!

Person Man · Sep 5, 2003, 02:26 PM

Originally posted by denim:
Given that the processor is from IBM, I figure we've got a new kind of IBM-compatible system here.

Um, no. The G5 will not run software designed for x86 PCs, which are the direct descendants of the IBM PC, which was intel-based, and the system which inspired the "IBM-compatibles"

This is totally different.

Link · Sep 5, 2003, 02:30 PM

There are 2 big differences between PPC (g5) and x86 (intel)

X86: usual code, less processor registers
PPC: backwards code, many more registers.

basically in PPC compiled code lines would read 110100 instead of 001011. (or so I hear).

The other fact is that the PPC architecture in general has it so that PPC processors have MANY more registers (preset processing procedures) then that of X86 processors. It is because of this reason that you cannot emulate a PPC processor (efficiently, at least), on an X86 machine.

denim · Sep 5, 2003, 03:34 PM

Originally posted by Person Man:
Um, no. The G5 will not run software designed for x86 PCs, which are the direct descendants of the IBM PC, which was intel-based, and the system which inspired the "IBM-compatibles"

Okay, I was a bit unclear: IBM. The processor is from IBM. Apple is using IBM's processor. Therefore, the computer is IBM-compatible. Has nothing to do with x86. Perhaps it'll help if I add a

to the original message?

Another way to put it is that an OS/390 box is IBM-compatible (

) 'cause it's from IBM.

Commodus · Sep 5, 2003, 04:03 PM

I'm surprised that others didn't catch on to this sooner... it's a joke, people! Mind you, for the longest time before the G4 Apple was using IBM processors (G3s) in the high-end as well.

Edit: 500th post! I'm now officially an elite member. It feels odd to be considered a long-standing member of this site when I've only had a Mac for about 9 months.

blueshift · Sep 5, 2003, 09:27 PM

Yeah but...."IBM Compatible" machines (read x86 compatible) never used an IBM processor.....their "IBM PC" line of computers popularized the use of intel's processors ...back in the early 80s.

-blue

dudesteve · Sep 5, 2003, 10:17 PM

Originally posted by Link:
basically in PPC compiled code lines would read 110100 instead of 001011. (or so I hear).

Google on something like "big little endian" and you'll find that your understanding is not quite right.

And while x86 is little endian, PPC can be either, though I think it is always used big endian (Mac/AIX/etc).

gadster · Sep 8, 2003, 06:42 AM

Originally posted by Commodus:
I'm surprised that others didn't catch on to this sooner... it's a joke, people! Mind you, for the longest time before the G4 Apple was using IBM processors (G3s) in the high-end as well.

Edit: 500th post! I'm now officially an elite member. It feels odd to be considered a long-standing member of this site when I've only had a Mac for about 9 months.

Commodus is correct.

It.
Was.
A.
Joke.

Google 'irony'.

CIA · Sep 8, 2003, 12:09 PM

I'm surprised that others didn't catch on to this sooner... it's a joke, people! Mind you, for the longest time before the G4 Apple was using IBM processors (G3s) in the high-end as well.

Edit: 500th post! I'm now officially an elite member. It feels odd to be considered a long-standing member of this site when I've only had a Mac for about 9 months.

Long standing? You registered last year!

jcadam · Sep 8, 2003, 04:19 PM

Originally posted by Link:
There are 2 big differences between PPC (g5) and x86 (intel)

X86: usual code, less processor registers
PPC: backwards code, many more registers.

basically in PPC compiled code lines would read 110100 instead of 001011. (or so I hear).

The other fact is that the PPC architecture in general has it so that PPC processors have MANY more registers (preset processing procedures) then that of X86 processors. It is because of this reason that you cannot emulate a PPC processor (efficiently, at least), on an X86 machine.

usual and backwards??? It's Little Endian and Big Endian. To some the X86 is backwards.

tooki · Sep 8, 2003, 04:57 PM

The first Power Macs to use IBM processors were the original PPC601-based Macs: the 61/71/8100 back in 1994.

Apple using IBM chips is nothing new -- it'll be 10 years of it next year.

Almost all of the G3s Apple has used were IBM, too -- only the Beige G3s and Wallstreet PowerBooks used Motorola G3s.

tooki

tooki · Sep 8, 2003, 05:07 PM

Originally posted by Link:
X86: usual code, less processor registers
PPC: backwards code, many more registers.

If anything, big-endianness (e.g. PowerPC) is the norm -- PPC, Motorola 680x0, Sun SPARC, MIPS, Java's VM, etc. Intel x86 is the only architecture I know of that is natively little-endian. [Edit: further research found that old DEC hardware was also little-endian.]

Early PPC models were strictly big-endian. The G3 introduced switchable endianness (hence why VPC 4 and later demand a G3 or G4 -- once the bi-endianness was available, they rewrote VPC to use that function, since it saved a lot of CPU power).

Most modern CPU architectures support bi-endianness: PPC, MIPS, IA-64, and probably others.

tooki

juanpacolopez · Sep 8, 2003, 06:29 PM

Originally posted by tooki:
[Edit: further research found that old DEC hardware was also little-endian.]

As I recall it was the first couple VAX servers/workstations that were little endian (and CISC too, as I recall). Didn't they switch to a RISC architecture before (slightly before) they started making Alpha's?

denim · Sep 9, 2003, 10:02 AM

Originally posted by juanpacolopez:
As I recall it was the first couple VAX servers/workstations that were little endian (and CISC too, as I recall). Didn't they switch to a RISC architecture before (slightly before) they started making Alpha's?

You don't seem to have a good understanding of what "big endian", "little endian", "CISC", and "RISC" mean.

VAX is a CISC architecture. That means it uses slow instructions to do a lot of work each. Those instructions are slower because they do a lot.

Alpha is a RISC architecture. That means it uses lots of small instructions which each do a little bit of work. Those instructions are faster because they do a little bit.

There used to be a big debate about which was faster: using a few big powerful instructions that do a lot or using lots of little instructions to do little things. This ended when people implemented RISC chips and found that they end up faster, even though it takes more code to implement the same operations that a CISC machine does in less code.

It has to do with the time it takes for each instruction to execute. A CISC instruction takes longer (more clock ticks) to do its thing, whereas a sequence of RISC instructions to do the same task executes in less time. This wasn't clearly predicted by theory. It had to be implemented and then measured.

...but that wasn't the point of this thread.

j mars · Sep 9, 2003, 12:03 PM

What you all are missing is the fact that OSX/Darwin/G5 IS IBM compatible (and everyother Unix mainframe). Don't get caught up in the old 1984 hammer throwing anti IBM craze. Macintosh is no longer the "oddball" operating system. Windows is infact the odd man out. When the computer professionals fully realize this and tire of Window's security problems it will again be Apple's era just as it was before the IBM PC. Just be patient, it will not happen overnight just as Apple cannot increase their production tenfold overnight. But all the pieces are nearly in place and every month there is a new Windows virus scare. Eventually the truth will win out.javascript:smilie('

')

Superchicken · Sep 9, 2003, 05:55 PM

Originally posted by tooki:
The first Power Macs to use IBM processors were the original PPC601-based Macs: the 61/71/8100 back in 1994.

Apple using IBM chips is nothing new -- it'll be 10 years of it next year.

Almost all of the G3s Apple has used were IBM, too -- only the Beige G3s and Wallstreet PowerBooks used Motorola G3s.

tooki

Correction my Rev D iMac has a moto G3, I should know I read the text and weas surprised that it wasn't an IBM G3.

Mrjinglesusa · Sep 9, 2003, 08:09 PM

Originally posted by Commodus:
I'm surprised that others didn't catch on to this sooner... it's a joke, people! Mind you, for the longest time before the G4 Apple was using IBM processors (G3s) in the high-end as well.

Edit: 500th post! I'm now officially an elite member. It feels odd to be considered a long-standing member of this site when I've only had a Mac for about 9 months.

You can probably attribute that to way too much free time.

mac freak · Sep 9, 2003, 11:46 PM

I'm still pissed I lost about 1,450 posts when the admins erased a bunch of archived threads... hehe...
I used to post a lot. Like 3 years ago. It's odd to think that it has been so long!

Anyway, yes, the thread starter has a valid and rather ironic/humorous point that I'm sure many of use have though about a few times here and there

olePigeon · Sep 11, 2003, 08:45 PM

Originally posted by Link:
There are 2 big differences between PPC (g5) and x86 (intel)

X86: usual code, less processor registers
PPC: backwards code, many more registers.

basically in PPC compiled code lines would read 110100 instead of 001011. (or so I hear).

I think that's "little endien" and "big endien," witch the PowerPC supports BOTH. Intel only does "little endien," so that point isn't valid.

juanpacolopez · Sep 11, 2003, 10:08 PM

Originally posted by denim:
You don't seem to have a good understanding of what "big endian", "little endian", "CISC", and "RISC" mean.

VAX is a CISC architecture. That means it uses slow instructions to do a lot of work each. Those instructions are slower because they do a lot.

Alpha is a RISC architecture. That means it uses lots of small instructions which each do a little bit of work. Those instructions are faster because they do a little bit.

There used to be a big debate about which was faster: using a few big powerful instructions that do a lot or using lots of little instructions to do little things. This ended when people implemented RISC chips and found that they end up faster, even though it takes more code to implement the same operations that a CISC machine does in less code.

It has to do with the time it takes for each instruction to execute. A CISC instruction takes longer (more clock ticks) to do its thing, whereas a sequence of RISC instructions to do the same task executes in less time. This wasn't clearly predicted by theory. It had to be implemented and then measured.

...but that wasn't the point of this thread.

I'm well aware of the difference friend

And CISC isn't "bigger, slower instructions"... it's MORE numerous, specialized instructions (I think x86(int)/x87(fp) is up to around 200-ish); Conversely, RISC is a smaller number of more generic instructions that operate on (generally) larger chunks of data at once.

Perhaps I wasn't clear, I was simply pointing out that the VAX's to which the person I was responding to was referring were:

1) little endian
2) CISC

And the Alpha's were:

1)big endian
2)RISC

If I'm not mistaken the Alpha was the first processor from Digital that used a RISC instruction set. The fact that the VAX used a CISC core was coincidental to the fact that it was little endian; not exclusive (as I may have implied).

Catfish_Man · Sep 11, 2003, 10:59 PM

Originally posted by olePigeon:
I think that's "little endien" and "big endien," witch the PowerPC supports BOTH. Intel only does "little endien," so that point isn't valid.

heh. VirtualPC doesn't work BECAUSE PowerPC doesn't support both. The G3 and G4 can fake one and handle the other normally, but not all PowerPCs can do this.

tadd · Sep 11, 2003, 11:09 PM

Perversely the G5 will NOT support the dual endian-ness that previous PPCs could handle Thus we lose Virual PC.

mac freak · Sep 12, 2003, 12:03 AM

VPC did not take advantage of the little-endianness until v4, IIRC. And frankly, the speed differences since v3 have been miniscule, at least from the perspective of a DP450 user (nowhere near what Connectix claimed it was).

denim · Sep 12, 2003, 01:36 PM

Originally posted by juanpacolopez:
I'm well aware of the difference friend

Well, good!

And CISC isn't "bigger, slower instructions"... it's MORE numerous, specialized instructions (I think x86(int)/x87(fp) is up to around 200-ish); Conversely, RISC is a smaller number of more generic instructions that operate on (generally) larger chunks of data at once.

Actually, that's true too. We're both focusing on different aspects of the issue, but there's nothing either of us has posted on this which is incorrect.

And the Alpha's were:

1)big endian
2)RISC

IIRC, it's selectable-endian.

If I'm not mistaken the Alpha was the first processor from Digital that used a RISC instruction set.

Well, yes. They also used a MIPS chip for a time in some of their workstations.

The fact that the VAX used a CISC core was coincidental to the fact that it was little endian; not exclusive (as I may have implied).

Right. I chose to not bother explaining that. My post was already long and people didn't sign up for a computer architecture class here. :-)