[rmendis]

Apple most likely will debut a new bus architecture to support the 900MHz bus of IBM's PowerPC 970.

The quesiton is whether it will be either HyperTransport or RapidIO?

Given that Apple is a founder member of the HyperTransport consortium it would seem that they would pick HyperTransport.

However both Motorola and IBM are RapidIO supporters.

The PowerPC 970 doesn't have any built in interconnects of any kind. (Unlike AMD's Hammer which has *3* integrated hypertransport connects which allows it to be configured into a 4-way SMP system with no need for additional support/interconnect chips). See:
http://www.gen-x-pc.com/amd_hammer_vs_intel_itanium.htm

Apple is in the habit of producing its own ASICs, so it may provide its own hyperTransport switch chip to produce 2 and 4-way SMP systems. (However, it would have been much cooler and cheaper to have had HyperTransport connects integrated onto the PPC970 chip like AMD Athlon-64 and Opteron).

I suspect as AMD and nVIDA are supporting HyperTransport, HyperTransport support chips are likely to be more popular and therefore cheaper.

So my guess it will be: HyperTransport.

[Catfish_Man]

It will be neither. However, the chipset connections may be RapidIO (IBM will most likely make the "northbridge" chip, and IBM backs RapidIO, so I assume it will be RapidIO). Neither RapidIO nor HyperTransport is compatible with the 970's link to the northbridge (just like they aren't compatible with MPX, 60x, the P4's bus, or the EV6 bus). That's just not what they're for.

[rmendis]

Originally posted by Catfish_Man:
It will be neither. However, the chipset connections may be RapidIO (IBM will most likely make the "northbridge" chip, and IBM backs RapidIO, so I assume it will be RapidIO).

Any idea which of HyperTransport or RapidIO Motorola's G5 supports...if indeed there is to be such a chip?

[rmendis]

Originally posted by Catfish_Man:
It will be neither. However, the chipset connections may be RapidIO (IBM will most likely make the "northbridge" chip, and IBM backs RapidIO, so I assume it will be RapidIO)

An article on architosh says that IBM is implementing a HyperTransport interconnect on the PowerPC 970 for Apple.

http://www.architosh.com/news/2002-1...7457-rm2.phtml

So HyperTransport it is then :-)

[Catfish_Man]

Originally posted by rmendis:
Any idea which of HyperTransport or RapidIO Motorola's G5 supports...if indeed there is to be such a chip?

Motorola has announced the RapidIO is going to be the interconnect for all their next generation chips, including the 8540/8560 (G5s).

In response to the post above this, I don't believe that article. The 7457-RM has a RapidIO interconnect and an on chip DDR controller, not this "Apple-PI" thing (this is according to the Motorola roadmap). The rest of the article could be correct, but parts of it don't make sense. Linear integer scaling is absurd, it's been proven that it can't happen. Killing a project because it uses ~20-40 watts of power (typical) is also absurd for a desktop chip, since most of the competetion uses 60-100 watts, and the PowerPC970 uses 42 watts.

[rmendis]

Originally posted by Catfish_Man:
Motorola has announced the RapidIO is going to be the interconnect for all their next generation chips, including the 8540/8560 (G5s).

It looks to me like RapidIO is headed for the embedded market (supported by Motorola and IBM in that space) while HyperTransport looks set to dominate the desktop (with support from AMD, nVIDIA and possibly IBM as well in the desktop/workstation market).

With the number of desktop and workstation vendors using AMD's Athlon-64 and Opteron, there are likely to be a pleathora of inexpensive, commodity HyperTransport support chipsets. While this may not be the case for RapidIO...maybe in the embedded space but not for the desktop.

So i can see why Apple may have opted out of the Motorola G5.

IBM is a more customer focused company and it is quite possible that they may have incorporated HyperTransport into the PPC 970 at Apple's request.

The exciting thing about HyperTransport (over RapidIO even) is that it can double up as a multi-processing bus. That is AMD chips can be linked together in 2, 4 and even 8 way (Opteron) SMP (NUMA) systems without the need for additional support chips.

The PPC 970 with one interconnect should form dual processor configurations similarly. (A successive iteration to it with two interconnects for example would form a 4-way just as simply).

So perhaps we should see single and dual configured PPC 970 based PowerMac G5s when they do debut?