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Picture of a G5 derivative
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Metzen
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Jul 28, 2002, 10:11 PM
 
<img src="http://e-www.motorola.com/images/products/MPC8560image.jpg" alt=" - " />

Specs listed here:
MPC8560 Features
Embedded <a href="http://e-www.motorola.com/webapp/sps/site/overview.jsp?nodeId=03M943030450467M0ys3k3KQ" target="_blank">e500 Book E</a> compatible core available from 600 MHz up to 1 GHz
32-bit, dual-issue, superscalar, seven-stage pipeline
1850 MIPS at 800 MHz (est. Dhrystone 2.1) --&gt; G4 score is 2310 @ 1 GHz
32 KB L1 data and 32 KB L1 instruction cache with <a href="http://sources.redhat.com/sid/component-docs/hw-cache.html" target="_blank">line locking support</a>
256 KB on-chip L2 cache with direct mapped capability
Enhanced hardware and software debug support
Memory management unit (MMU)
<a href="http://www.altivec.org/" target="_blank">SIMD extension with single precision floating point </a>
High-performance <a href="http://e-www.motorola.com/brdata/PDFDB/docs/AN2059.pdf" target="_blank">RISC CPM</a> available at up to 333 MHz
CPM software compatibility with previous families
Greater than 1 Gbps aggregate CPM bandwidth
32 KB of <a href="http://www.electronicstalk.com/news/cyp/cyp146.html" target="_blank">dual-port RAM </a>
128 KB of ROM + 32 KB of RAM for protocol microcode storage
Two <a href="http://www.agere.com/metro_regional_transport/docs/PN96064.pdf" target="_blank">UTOPIA Level II master/slave ports</a> with <a href="http://grouper.ieee.org/groups/802/3/efm/public/jan02/rezvani_2_0102.pdf" target="_blank">multi-PHY</a> support (one can be 16-bit)
Three <a href="http://www.netcomsystems.com/technology/appnotes/0901_1118C_AppNote30_GX-1421A.pdf" target="_blank">MII interfaces</a>
Eight <a href="http://www.webopedia.com/TERM/T/TDM.html" target="_blank">TDM interfaces</a> (T1/E1), two TDM ports that can be interfaced with T3/E3
Four SCCs supporting <a href="http://www.rad.com/networks/1994/hdlc/hdlc.htm" target="_blank">HDLC and SDLC, HDLC bus</a>, UART, Transparent, <a href="http://ckp.made-it.com/bisync.html" target="_blank">BISYNC</a>
Three FCCs supporting:
Up to 155 Mbps <a href="http://www.protocols.com/pbook/atmsar.htm" target="_blank">ATM SAR-AAL0, AAL1, AAL2, AAL3/4, AAL5</a>
10/100 Mbps Ethernet (up to three) IEEE 802.3X
45 Mbps HDLC/transparent (up to three)
Two MCCs each supporting 128 full-duplex, 64 kbps, HDLC lines for a total of 256 channels
ATM transmission convergence layer capabilities (8 channels)
Integrated inverse multiplexing for ATM (IMA) functionality
Two triple-speed Ethernet controllers (TSECs) supporting 10/100/1000 Mbps Ethernet (IEEE 802.3, 802.3u, 802.3x, 802.3z, and 802.3ac compliant) with two GMII/TBI/RGMII interfaces
166 MHz, 64-bit, 2.5V I/O, DDR SDRAM memory controller with full ECC support
<a href="http://www.rapidio.org/about/Technology" target="_blank">500 MHz, 8-bit, LVDS I/O, RapidIO controller</a> --&gt; see <a href="http://e-www.motorola.com/collateral/SNDFR1603.pdf" target="_blank">here</a> as well
133 MHz, 64-bit, 3.3V I/O, <a href="http://www.pcisig.com/specifications/pci_x" target="_blank">PCI-X 1.0a</a>/<a href="http://www.pcisig.com/specifications/conventional_pci" target="_blank">PCI 2.2</a> bus controller
166 MHz, 32-bit, 3.3V I/O, local bus with memory controller
Integrated four-channel DMA controller
Interrupt controller
<a href="http://www.ti.com/sc/docs/jtag/seminar1.pdf" target="_blank">IEEE 1149.1 JTAG test access port</a>
1.2V core power supply with 3.3V and 2.5V I/O
783-pin <a href="http://www.necel.com/docs/files/STDFCBGA_PKG_51002.pdf" target="_blank">FC-BGA</a> package

Motorola calls the 85xx series chips the G5... They ARE shipping, but they (the 8540 and 8560) are embedded specific chips. But with so much power crammed into these embedded chips, it has to bode well that the high-performance computing version of the G5 will be extremely powerful.
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Back up 15 and punt
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Jul 28, 2002, 10:46 PM
 
This is not the G5 that will be placed inside of Apple's CPU's. This is the embedded chip. The one that Apple will use will be a 64 bit chip architecture.
     
Jim Paradise
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Jul 28, 2002, 11:38 PM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Back up 15 and punt:
<strong>This is not the G5 that will be placed inside of Apple's CPU's. This is the embedded chip. The one that Apple will use will be a 64 bit chip architecture.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">It's not for certain that Apple will use a 64 bit chip *or* that their next-gen chip is even going to be from Motorolla.
     
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Jul 29, 2002, 12:23 AM
 
That SIMD is not Altivec.
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Graymalkin
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Jul 29, 2002, 01:08 AM
 
Dammit. Look, the 8 in front of the number of the chip means IT IS EMBEDDED AND NOT INTENDED FOR USE IN WORKSTATIONS. The G5 if ever released will be numbered 75xx, fifth generation, seven for the model type. The 85xx is not a desktop freaking processor. The Book E component is basically a 604e chip. An embedded processor for those of you who do not seem to grasp the concept is a processor attached to the components normally found in northbridge and southbridge chips. That is why the 8560 has so many "features" it is a system on a chip. It however is NOT going to end up in PowerMacs any time in the future. The 8560 is going to end up in telecom equipment and other such high speed embedded systems.

Some day Motorola might release the 7500 for use in PowerMacs, it will likely be a 64-bit extension on the PowerPC instruction set. Does Apple need a 64-bit ISA though? No. Being able to address upwards of 4GB of memory is great but you can do that with current 32-bit processors, the 7450 supports up to 64GB of real memory and 4 petabytes of virtual memory. It uses 36-bit memory addressing, just like the Intel Xeon processor. What the 74xx needs for a real speed boost is a faster FPU or just a second one so it can keep up with the Athlon which has a similar clock difficiency but has tremendous DPFP performance. The 7450 has four freaking IPUs but only a single FPU with the intent to rely on the AltiVec processor to handle all the SPFP operations which many programmers do not do yet. A 64-bit chip won't solve Mot's performance problems with their PowerPC chips. Improving the FP design and further parallelizing the design of the chip will go much farther to increase performance than 64-bits of memory space and instructions.
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Jul 29, 2002, 01:10 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Jim Paradise:
<strong> </font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Back up 15 and punt:
<strong>This is not the G5 that will be placed inside of Apple's CPU's. This is the embedded chip. The one that Apple will use will be a 64 bit chip architecture.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">It's not for certain that Apple will use a 64 bit chip *or* that their next-gen chip is even going to be from Motorolla.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Unless Apple decides they don't want to use a Motorola chip, or Motorola decides that the G5 for the desktop won't be a 64 bit chip, or Apple decides to use the latest AMD chip (64 bit) or they decide to use Itanium (which I think could be possible provided that Motorola can get the cost down along with the thermal output) then I think you might be right. Only time will tell.
     
Jim Paradise
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Jul 29, 2002, 02:10 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Back up 15 and punt:
<strong> </font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Jim Paradise:
<strong> </font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Back up 15 and punt:
<strong>This is not the G5 that will be placed inside of Apple's CPU's. This is the embedded chip. The one that Apple will use will be a 64 bit chip architecture.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">It's not for certain that Apple will use a 64 bit chip *or* that their next-gen chip is even going to be from Motorolla.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Unless Apple decides they don't want to use a Motorola chip, or Motorola decides that the G5 for the desktop won't be a 64 bit chip, or Apple decides to use the latest AMD chip (64 bit) or they decide to use Itanium (which I think could be possible provided that Motorola can get the cost down along with the thermal output) then I think you might be right. Only time will tell.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">It's quite possible that Apple will use a processor from IBM. Power4 perhaps? <img border="0" title="" alt="[Wink]" src="wink.gif" />
     
rambo47
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Jul 29, 2002, 08:15 AM
 
The Power4 processor costs more than a current PowerMac! No way we'll see the Power4 in anything but servers designed for corporations. That having been said, some one in another thread brought up the possibility of Apple spending some of the cash supply they've amassed and convincing IBM to develop a Power4/5 derivative to power the next generation of PowerMacs. Unfortunately, it would be years before any such chip makes its appearance.

I see no problem with the G4, especially when they migrate to the .13u fabrication. That can't happen fast enough!
     
The Placid Casual
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Jul 29, 2002, 08:40 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by rambo47:
<strong>The Power4 processor costs more than a current PowerMac! No way we'll see the Power4 in anything but servers designed for corporations. That having been said, some one in another thread brought up the possibility of Apple spending some of the cash supply they've amassed and convincing IBM to develop a Power4/5 derivative to power the next generation of PowerMacs. Unfortunately, it would be years before any such chip makes its appearance.

I see no problem with the G4, especially when they migrate to the .13u fabrication. That can't happen fast enough!</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Yes, a full blown Power4 will cost not just more than a Powermac..but alot more than 10+ powermacs....and would also need an industrial cooling system!

However, IBM are currently planning to use defective Power4 chips in workstations and sell them for a much reduced price...these chips would be effectively 'defective' in some aspect, eg 1 core that is faulty etc however they would still be awesome... This obviously brings the cost down significantly, as they are using chips that would otherwise be waste...

How many of these are there? obviously a fair few or IBM would not even consider it...Any left for Apple?

As you mention, IBM do indeed have a history of making custom chips for different customers...such as the Geko chip for the Nintendo game cube...What if Apple has organised for a cut down Power4 or Power5 to be made to their own personal specs already?

If the rumors are to be believed, ages ago Apple wanted Motorola to make a custom chip using 'Apple Pi' a custom instruction set...they refused. If Apple went to IBM then, 1 year ago+, the results may be closer than we think..

Assuming the chip is Power4/Power5 based, the majority of the R&D is done..to convert it to Apples requirements would take a certain amount of work, but I would guess not 2+ years...

MYSF '03 anyone <img border="0" title="" alt="[Wink]" src="wink.gif" />

Either way I think that the G4 is doing great...If it scales as well as it looks it will, on the 0.13 process, and with extra fpu units it would look good for a long time yet...I mean, I wouldn't turn down a 2 ghz G4+ with DDR, quick FSB etc...what speeds are AMD up to now anyway <img border="0" title="" alt="[Wink]" src="wink.gif" />

Peace,

Marc

<small>[ 07-29-2002, 08:44 AM: Message edited by: Marc2211 ]</small>
     
zac4mac
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Jul 29, 2002, 08:45 AM
 
This is what happens when you surf on two machines at once... wrong post.

<small>[ 07-29-2002, 08:48 AM: Message edited by: zac4mac ]</small>
     
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Jul 29, 2002, 11:00 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by rambo47:
<strong>The Power4 processor costs more than a current PowerMac! No way we'll see the Power4 in anything but servers designed for corporations. That having been said, some one in another thread brought up the possibility of Apple spending some of the cash supply they've amassed and convincing IBM to develop a Power4/5 derivative to power the next generation of PowerMacs. Unfortunately, it would be years before any such chip makes its appearance.

I see no problem with the G4, especially when they migrate to the .13u fabrication. That can't happen fast enough!</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">They don't have to be expensive.
There are two major factors that are responsible for the high costs:

1. Large cache (very large cache) -- the cache is responsible for a lot of the transistor count, i. e. the size of the die. A smaller die would increase the yields and lower the costs.

2. Low-volume production. By (hypothetically) delivering (modified) Power4s to Apple, IBM would be able to optimize their production and they would be able to offer low-cost Power4s also that replace the current Power3-II chips left in the line-up (375 MHz ).

I wouldn't rule it out completely. IMHO, it is far more likely than migrating to IA-32.
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pcd2k
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Jul 29, 2002, 11:20 AM
 
marc2211 said

'...if the rumors are to be believed,
ages ago Apple wanted Motorola to make a custom chip using
'Apple Pi' a custom instruction set...they refused.

1stly what is that ?

If Apple went to IBM then, 1 year ago+,
the results may be closer than we think.. "

2ndly what chip does SUN use ?
     
Metzen  (op)
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Jul 29, 2002, 05:23 PM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>Dammit. Look, the 8 in front of the number of the chip means IT IS EMBEDDED AND NOT INTENDED FOR USE IN WORKSTATIONS. The G5 if ever released will be numbered 75xx, fifth generation, seven for the model type. The 85xx is not a desktop freaking processor. The Book E component is basically a 604e chip. An embedded processor for those of you who do not seem to grasp the concept is a processor attached to the components normally found in northbridge and southbridge chips. That is why the 8560 has so many "features" it is a system on a chip. It however is NOT going to end up in PowerMacs any time in the future. The 8560 is going to end up in telecom equipment and other such high speed embedded systems.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Please <a href="http://e-www.motorola.com/collateral/SNDFH1101.pdf" target="_blank">read the following.</a>

Most specifically pages 4 & 5. The only direction Motorola is taking with its future chips is the BookE spec. Granted, the e500 core Motorola is currently using in there production chips don't incorporate some of the more powerful features of the <a href="http://e-www.motorola.com/brdata/PDFDB/docs/EREF.pdf" target="_blank">BookE spec.</a> As well, in case you didn't notice, the 7450-style chip is used more in <a href="http://www.teledotcom.com/article/TEL20010731S0001" target="_blank">routers</a> than it is personal computers, thus your "embedded chip only" application is a pretty moot point.

All next-generation (G5) chips will be based off the Book E spec.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>Some day Motorola might release the 7500 for use in PowerMacs, it will likely be a 64-bit extension on the PowerPC instruction set. Does Apple need a 64-bit ISA though? No. Being able to address upwards of 4GB of memory is great but you can do that with current 32-bit processors, the 7450 supports up to 64GB of real memory and 4 petabytes of virtual memory. It uses 36-bit memory addressing, just like the Intel Xeon processor.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">There are other uses for a 64-bit chip besides increases in the maximum amount of RAM.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>What the 74xx needs for a real speed boost is a faster FPU or just a second one so it can keep up with the Athlon which has a similar clock difficiency but has tremendous DPFP performance. The 7450 has four freaking IPUs but only a single FPU with the intent to rely on the AltiVec processor to handle all the SPFP operations which many programmers do not do yet. A 64-bit chip won't solve Mot's performance problems with their PowerPC chips.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">I'm not saying that a 64bit chip will solve Motorola's performance problems.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>Improving the FP design and further parallelizing the design of the chip will go much farther to increase performance than 64-bits of memory space and instructions.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Explain how "parallelizing the design of the chip" will do anything for the chip.
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Jim Paradise
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Jul 29, 2002, 07:21 PM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by rambo47:
<strong>The Power4 processor costs more than a current PowerMac! No way we'll see the Power4 in anything but servers designed for corporations. That having been said, some one in another thread brought up the possibility of Apple spending some of the cash supply they've amassed and convincing IBM to develop a Power4/5 derivative to power the next generation of PowerMacs. Unfortunately, it would be years before any such chip makes its appearance.

I see no problem with the G4, especially when they migrate to the .13u fabrication. That can't happen fast enough!</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Well, Apple certainly would have known within the last year and a half Motorolla's craptacular scalling capabilities... it's possible that a Power4 derivative could have been in the works for a while?
     
Brit Ben
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Jul 29, 2002, 07:37 PM
 
[/qb][/QUOTE]Explain how "parallelizing the design of the chip" will do anything for the chip.[/QB][/QUOTE]

Is parallelizing even a word ? Dictionary.com suggests not.

Sorry, long day, couldn't resist it !

Ben.
     
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Jul 29, 2002, 09:25 PM
 
heh... all I can say is... apple better come out with your guy's fictional proccessor BEFORE I buy my next Mac otherwise I'll be very angry when I'm left in the dust!
     
Graymalkin
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Jul 29, 2002, 10:35 PM
 
Aw the kids have come out to play.

1. The POWER3/4 chips are not binary compatible with Motorola's PowerPC chips. They will not be making an appearance if Macs anytime ever. Doing so would be a retarded move on IBM's part. Why would anyone buy a IBM POWER4 based workstation when a PowerMac using the same processor costs $1600? The POWER4 IS an expensive processor to produce as the base core is actually a double core design with versions with up to 4 operating cores. Spitting out single core models with a small cache would still cost plenty of money because the POWER4 is a hefty chip.

2. Metzen, the Book E spec is the PowerPC instruction set. Like I said, a Book E processor is the 604e. The G4 does not follow the Book E spec to the letter because of the AltiVec instructions added on top of the regular Book E spec. A G5 will indeed be an extension of the instruction set and be backwards compatible with it. Where did I say it wasn't? The 8560 chip will not be in workstations, ever. That was the whole topic of this thread, some jackass pointing out the 8560 and thinking it was the G5 everyone is so rabidly waiting for. A embedded processor like the 8560 is just as I described it, a processor mated with I/O controllers on the same die. The G5 in Macs will be a 75xx series chip. It will not have a e500 core and probably only have half of the components the 8560 has on-chip.

3. Have you ever used a Cisco router? All but the most basic models are more computer than pure router. Will it have some stock motherboard and periphrials? Hell no. The 7540 will be hooked up to a heavily modded MPX controller with scads of onboard communication components, much like the 8560 has. In case you didn't know Motorola is a huge producer of embedded processors. Cisco picking them as their main chip provider is not very suprising as it is either them or TI. What about Cisco using a 7450 makes the 7450 a non-workstation class processor? You're pointing out Cisco's use of the 7450 as what, a rebuttal suggesting the 8560 will end up in Macs because a 7450 ended up in a router? Please you've got to do better than that. The 8560 is an integates ground up communication controller, it is designed for the kind of equipment you plug Cisco routers into.

4. Parallelizing is when you add execution pipelines to a processing unit. This increases performance in measurements of metric buttloads. The 7450 has four parallel integer processing pipelines but only a single floating point pipeline. Adding pipelines means a higher transistor count but also an increase in throughput as you've got multiple pipelines all operating in their own context. How do you think nVidia and ATi make such fast graphics processors? They certainly don't have a single pipeline everything is run through. The Athlon has three out of order fully pipelined floating point execution units. It is no wonder the Athlon totally whomps on the competition in raw FPU performance, it gets more floating point operations done per clock than either the P4 or G4. The only thing keeping the P4 in the race for fastest processor is its ginormous clock speed advantage. The G4 needs greatly expanded floating point capabilities in the form of more execution pipelines because a majority of software doesn't use AltiVec instructions thus are stuck using the single floating point pipeline and performing badly compared to other processors. Even if people hopped on the AltiVec party bus they would then be limited by the lack of double prescision FP math which oddly enough many programs find a use for.
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piracy
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Jul 29, 2002, 10:59 PM
 
The 85xx family is not only for the embedded market, nor is the entire 8xxx family. In fact, the 86xx family will contain the G6.

The problem is that, while the 85xx family is the only family of processors that are true G5's, both by Motorola's own definitions and by standards of judging processor generations, Motorola isn't concentrating on anything but the embedded market. Just because MOSR, some lame rumors site, or some forum poster told you that we're really waiting for the 75xx doesn't make it so.

If a 75xx comes to fruition, and isn't significantly different from the 74xx family, it won't be accurate to call it a G5. Apple can certainly call it a G5 and market it as such, but it's not a true 5th generation processor. The ONLY FAMILY that is 5th generation, by Motorola's own definition - and it gets to MAKE the definitions - is the 85xx family.

The only G5 processors, for ANY market, embedded or otherwise, belong to the 85xx family.

Motorola has not productized or indicated in any roadmap plans for a 75xx family. The 74xx family is used heavily in the embedded market too; in fact, the 7455 won the Microprocessor Forum's Best Embedded Processor award in 2001. Does that mean, all of a sudden, that it's not a desktop processor? It's an embedded processor that happens to be good for desktop applications. I agree with you, that the 85xx family is NOT targetted at desktop applications.

All any of this proves, however, is not that the desktop G5 must be something else, but rather that Motorola isn't concentrating on the desktop market at all anymore with the G5. Sorry to break it to ya.
     
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Jul 29, 2002, 11:33 PM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>1. The POWER3/4 chips are not binary compatible with Motorola's PowerPC chips. They will not be making an appearance if Macs anytime ever. Doing so would be a retarded move on IBM's part. Why would anyone buy a IBM POWER4 based workstation when a PowerMac using the same processor costs $1600? The POWER4 IS an expensive processor to produce as the base core is actually a double core design with versions with up to 4 operating cores. Spitting out single core models with a small cache would still cost plenty of money because the POWER4 is a hefty chip.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">1. Who are you talking to regarding the POWER chips? Of course the POWER chips are binary incompatible with the PPC ISA, the only PowerPC chip to have the POWER ISA built into it was the 601, and that was later dropped. But I digress... This thread is not about the POWER line of chips.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>2. Metzen, the Book E spec is the PowerPC instruction set. Like I said, a Book E processor is the 604e. The G4 does not follow the Book E spec to the letter because of the AltiVec instructions added on top of the regular Book E spec.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Two things here...

1) The Book E spec is a specification drawn up to prevent a diverging set of PPC ISA's so everything remains binary compatible.

2) The G4 was out WAAAAAAAAAAAAAAAAAY before the Book E spec and if you bothered to even read the links I provided, Motorola tells you the differences between the Book E spec ISA and the AIM ISA. The Book E is better than what currently exsists. As well, the e500 core allows for additional APUs (Application Processing Units) like AltiVec to be added onto the core. Motorola uses some APU's in its 8560 but not in the 8540. It's a versatile chip.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>A G5 will indeed be an extension of the instruction set and be backwards compatible with it. Where did I say it wasn't?
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Where did I say you said it wasn't?

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>The 8560 chip will not be in workstations, ever. That was the whole topic of this thread, some jackass pointing out the 8560 and thinking it was the G5 everyone is so rabidly waiting for.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">As the initiator of this thread that was a poor pot-shot at me by someone who can't read or doesn't bother to read. Please read the Topic TITLE again, as well as the inital post.

Nevermind, since you won't be inclined to do so anyways, and I'm just going to make you look like an idiot, I'll quote myself from my first post

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Metzen:
<strong>Motorola calls the 85xx series chips the G5... They ARE shipping, but they (the 8540 and 8560) are embedded specific chips. But with so much power crammed into these embedded chips, it has to bode well that the high-performance computing version of the G5 will be extremely powerful.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Now please point out where I made it "That was the whole topic of this thread, some jackass pointing out the 8560 and thinking it was the G5 everyone is so rabidly waiting for."

Please and thank you.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>A embedded processor like the 8560 is just as I described it, a processor mated with I/O controllers on the same die. The G5 in Macs will be a 75xx series chip. It will not have a e500 core and probably only have half of the components the 8560 has on-chip.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Funny you say that now. As I recall, even Intel is moving to have "embedded" processor style chips by <a href="http://www.80211-planet.com/news/article/0,,1481_1013971,00.html" target="_blank">embedding things such as 802.11</a>. I wouldn't be too surprised to see these kind of things in the next generation PowerPC chip as well... Oh, wait, they're already here... Silly me.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>3. Have you ever used a Cisco router? All but the most basic models are more computer than pure router. Will it have some stock motherboard and periphrials? Hell no. The 7540 will be hooked up to a heavily modded MPX controller with scads of onboard communication components, much like the 8560 has. In case you didn't know Motorola is a huge producer of embedded processors. Cisco picking them as their main chip provider is not very suprising as it is either them or TI. What about Cisco using a 7450 makes the 7450 a non-workstation class processor? You're pointing out Cisco's use of the 7450 as what, a rebuttal suggesting the 8560 will end up in Macs because a 7450 ended up in a router? Please you've got to do better than that. The 8560 is an integates ground up communication controller, it is designed for the kind of equipment you plug Cisco routers into.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Sounds like your either in denial or have a poor definition of a "workstation" class processor. FACT: the 7450 is a embedded chip.

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>4. Parallelizing is when you add execution pipelines to a processing unit. This increases performance in measurements of metric buttloads.
</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Quite silly, though, to add such a cost to a EMBEDDED PROCESSOR. When someone like Cisco, who WILL purchase more processors than Apple, decides a second floating point unit will outweigh the costs of the detriment to performance, it'll be added. But at the present cost of some &gt;$400 per chip (in quantities of 1000's), I don't think that the added performance improvement is worth the cost, no? Especially when it does your biggest client no good...

</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Graymalkin:
<strong>The 7450 has four parallel integer processing pipelines but only a single floating point pipeline. Adding pipelines means a higher transistor count but also an increase in throughput as you've got multiple pipelines all operating in their own context. How do you think nVidia and ATi make such fast graphics processors? They certainly don't have a single pipeline everything is run through. The Athlon has three out of order fully pipelined floating point execution units. It is no wonder the Athlon totally whomps on the competition in raw FPU performance, it gets more floating point operations done per clock than either the P4 or G4. The only thing keeping the P4 in the race for fastest processor is its ginormous clock speed advantage. The G4 needs greatly expanded floating point capabilities in the form of more execution pipelines because a majority of software doesn't use AltiVec instructions thus are stuck using the single floating point pipeline and performing badly compared to other processors. Even if people hopped on the AltiVec party bus they would then be limited by the lack of double prescision FP math which oddly enough many programs find a use for.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Please, give us the massive list of programs that find a use for double prescision FP. I can think of VectorWorks, Strata3D, Mathematics... Not too much else comes to mind. Heck, LightWave has learned to use AltiVec with there renderer...

<small>[ 07-30-2002, 12:12 AM: Message edited by: Metzen ]</small>
Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction.
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TomD
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Jul 30, 2002, 12:34 AM
 
Dont know what definition of 'embedded' you're using, but in my world,
the MPC745x is in no-way an embedded part, it has none of the integrated
modules needed for an embedded design, like a memory controller, any IO,
multiple chip selects, dynamic clock frequency shift. onboard flash or
scratchpad SRAM, 32bit or 16 bit bus capability, etc..

It's primarily a desktop/server CPU intended to run in a system with many support chips. What Moto really needs to do is build a northbridge companion
chip for the G4 with 128bit databus that runs point-to-point at 400+ MHZ
to work with DDR and QDR RAMs as well as 8x AGP. That was the original intent
for the design, but they blew the design schedule for the northbridge and released the G4 by itself.
     
Rickag
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Jul 30, 2002, 09:42 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by Metzen:
<strong>

Motorola calls the 85xx series chips the G5... They ARE shipping, .</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">I believe it was an eWeek article that recently quoted Motorola as saying prototypes of the MPC 8560 would be available in 2003. I'm sooo confused.

Oh, just thought I'd add that your initial post is excellent and provides a well organized coherent sumary of information available concerning the MPC 8560. Thank you.

I also agree with you concerning the use of double precision floating point. It seems that it is used often when not needed, because; one it is easily available to programmers in code and two requires less optimization than single precision(I think because of the way compliers are written).

<small>[ 07-30-2002, 10:29 AM: Message edited by: Rickag ]</small>
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miro7
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Jul 30, 2002, 10:15 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Please, give us the massive list of programs that find a use for double prescision FP. I can think of VectorWorks, Strata3D, Mathematics... Not too much else comes to mind. Heck, LightWave has learned to use AltiVec with there renderer...</font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">I imagine that's why Nvidia, in their presentation and preview of their NV30, showed a migration from the 32bit Int precision for their 3D to 128bit FP precision in their chips (all multiple pipelines). Let's not count out the example of the Athlon that was mentioned, where in 3D performance, it usually stomps the G4 by a measure of about 2x or more (same with the P4 but not because of a superior FPU) because of the additonal FP Pipeline resources. The P4, which, in order to alleviate dependence on the stack oriented x87 FPU, added the necessary resources to do both single and double precision FP operations within their SIMD unit, something which Altivec doesn't currently do (I imagine that you could do DP in Altivec with some code tricks, but it would negate any benefit).

So, the rest of the industry is moving or has moved towards double precision FP and multiple FP Pipelines within their products. Why shoudn't the G4/5 have additonal resources added to its relatively weak FP? Because you don't know what applications take advantage of DP FP (anything scientific or requiring precise numbers can benefit)? The G4's FPU needs improvement. It does DP, but needs additional pipelines to compete with other processor families. At the very least, Altivec should have DP added to provide a complete solution for developers that need the resources (and at least show a direction from Moto). As it it right now, if you need the precision, you'll use the one FP Pipeline. The same code on either the Athlon or P4 is going to run faster.
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piracy
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Jul 30, 2002, 10:35 AM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by TomD:
<strong>Dont know what definition of 'embedded' you're using</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Just Motorola's and the Microprocessor Report's definitions, that's all.

From: <a href="http://216.239.51.100/search?q=cache:KURcnlie1BAC:www.motorola.com/mediacenter/press/releases/Mar/English/MotPR_1239_1.rtf" target="_blank">http://216.239.51.100/search?q=cache:KURcnlie1BAC:ww w.motorola.com/mediacenter/press/releases/Mar/English/MotPR_1239_1.rtf</a>

"Motorola's MPC7455 Processor Named Best High-Performance Embedded Processor 

In-Stat/MDR selects MPC7455 as Best High-Performance Embedded Processor of 2001 in their Annual Analysts' Choice Awards 

AUSTIN, Texas - March 13, 2002 - Motorola, Inc. (NYSE: MOT) the market share leader in communications semiconductors, today received a new honor that highlights their continued innovation, performance and versatility leadership in the high-performance embedded processor market. 

In-Stat/MDR (www.mdronline.com), a leading microprocessor research and analysis firm which publishes Microprocessor Report, announced today that they have selected Motorola's powerful MPC7455 host processor as the best high-performance embedded processor of 2001.  Delivering blazing speeds up to 1 GHz and pin-for-pin compatibility with other MPC745x processors, the MPC7455 offers a powerful, yet versatile processing solution for embedded systems, computing systems, as well as high performance network infrastructure and telecommunications equipment."

Microprocessor Report, the Microprocessor Forum, and Motorola are all proud to refer to the 745x as an embedded processor. And not just that, but the *best* embedded processor! If that doesn't say embedded, I don't know what does.

What some of you people don't understand is that there's no magic rule that makes a chip able, or unable, to be used in a desktop computing application. It's just that some chips are more targetted at particular markets. The 74xx family are embedded processors that happen to be pretty nice for desktop applications. The 85xx family is a freaking system-on-a-chip that is really pigeonholed more into an embedded application. As I said in my last post:

The only G5 processors, for ANY market, embedded or otherwise, belong to the 85xx family.

All this proves, however, is not that the desktop G5 must be something else, but rather that Motorola isn't concentrating on the desktop market at all anymore with the G5.

<small>[ 07-30-2002, 10:39 AM: Message edited by: piracy ]</small>
     
Catfish_Man
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Jul 30, 2002, 04:53 PM
 
</font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by piracy:
<strong> </font><blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">quote:</font><hr /><font size="1" face="Geneva, Verdana, Arial, sans-serif">Originally posted by TomD:
<strong>Dont know what definition of 'embedded' you're using</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">Just Motorola's and the Microprocessor Report's definitions, that's all.

From: <a href="http://216.239.51.100/search?q=cache:KURcnlie1BAC:www.motorola.com/mediacenter/press/releases/Mar/English/MotPR_1239_1.rtf" target="_blank">http://216.239.51.100/search?q=cache:KURcnlie1BAC:ww w.motorola.com/mediacenter/press/releases/Mar/English/MotPR_1239_1.rtf</a>

"Motorola's MPC7455 Processor Named Best High-Performance Embedded Processor 

In-Stat/MDR selects MPC7455 as Best High-Performance Embedded Processor of 2001 in their Annual Analysts' Choice Awards 

AUSTIN, Texas - March 13, 2002 - Motorola, Inc. (NYSE: MOT) the market share leader in communications semiconductors, today received a new honor that highlights their continued innovation, performance and versatility leadership in the high-performance embedded processor market. 

In-Stat/MDR (www.mdronline.com), a leading microprocessor research and analysis firm which publishes Microprocessor Report, announced today that they have selected Motorola's powerful MPC7455 host processor as the best high-performance embedded processor of 2001.  Delivering blazing speeds up to 1 GHz and pin-for-pin compatibility with other MPC745x processors, the MPC7455 offers a powerful, yet versatile processing solution for embedded systems, computing systems, as well as high performance network infrastructure and telecommunications equipment."

Microprocessor Report, the Microprocessor Forum, and Motorola are all proud to refer to the 745x as an embedded processor. And not just that, but the *best* embedded processor! If that doesn't say embedded, I don't know what does.

What some of you people don't understand is that there's no magic rule that makes a chip able, or unable, to be used in a desktop computing application. It's just that some chips are more targetted at particular markets. The 74xx family are embedded processors that happen to be pretty nice for desktop applications. The 85xx family is a freaking system-on-a-chip that is really pigeonholed more into an embedded application. As I said in my last post:

The only G5 processors, for ANY market, embedded or otherwise, belong to the 85xx family.

All this proves, however, is not that the desktop G5 must be something else, but rather that Motorola isn't concentrating on the desktop market at all anymore with the G5.</strong></font><hr /></blockquote><font size="1" face="Geneva, Verdana, Arial, sans-serif">I mostly agree with you, but if you look at the e500/8540/8560 specs it becomes fairly clear that it's designed for modularity. The e500 seems to be a pretty general use integer core, and the 8560 proves that it is possible to plug other things (FPUs for example) into the coherency module. This leads me to think that Motorola is trying to create a set of parts (e500, OCeaN, etc...) that can be easily customized for a variety of applications. Since Motorola's roadmap clearly states what 7 and 8 mean in their processor numbers, anything starting with an 8 is highly unlikely to be suitable for a Mac. With this modularity though, they might be able to make a 7xxx chip that would use many of the same components but be more suitable for a Mac. I would guess that it would be a 7500 (500 being 5th generating, type 0, revision 0). The e500 gets about the same integer performance as the 7455, so if they added a beefed up FPU and Altivec, and gave it an on chip DDR333 controller (like the 8540 or the Clawhammer) they'd have a pretty kick *** desktop chip.
     
   
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